condition code register - significado y definición. Qué es condition code register
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Qué (quién) es condition code register - definición

REGISTER CONTAINING FLAGS GIVING ADDITIONAL INFORMATION CONCERNING A RESULT IN A PROCESSOR
Condition Code Register; Flag register; Condition code register; Processor flag

Status register         
A status register, flag register, or condition code register (CCR) is a collection of status flag bits for a processor. Examples of such registers include FLAGS register in the x86 architecture, flags in the program status word (PSW) register in the IBM System/360 architecture through z/Architecture, and the application program status register (APSR) in the ARM Cortex-A architecture.
Register (sociolinguistics)         
FORM OF LANGUAGE USED FOR A PARTICULAR PURPOSE OR IN A PARTICULAR COMMUNICATIVE SITUATION
Levels of Register; Speech register; Diatype; Linguistic register; Language register; Formality scale; Lexicographical register; Formality level; Register (socio-linguistics); Speech levels; Formal register; Informal register; Low-register; High-register; Consultative register; Frozen register; Casual register; Intimate register
In sociolinguistics, a register is a variety of language used for a particular purpose or in a particular communicative situation. For example, when speaking officially or in a public setting, an English speaker may be more likely to follow prescriptive norms for formal usage than in a casual setting, for example, by pronouncing words ending in -ing with a velar nasal instead of an alveolar nasal (e.
Register (phonology)         
FEATURE OF SOME TONAL LANGUAGES
Register language; Phonetic register; Pitch register
In phonology, a register, or pitch register, is a prosodic feature of syllables in certain languages in which tone, vowel phonation, glottalization or similar features depend upon one another.

Wikipedia

Status register

A status register, flag register, or condition code register (CCR) is a collection of status flag bits for a processor. Examples of such registers include FLAGS register in the x86 architecture, flags in the program status word (PSW) register in the IBM System/360 architecture through z/Architecture, and the application program status register (APSR) in the ARM Cortex-A architecture.

The status register is a hardware register that contains information about the state of the processor. Individual bits are implicitly or explicitly read and/or written by the machine code instructions executing on the processor. The status register lets an instruction take action contingent on the outcome of a previous instruction.

Typically, flags in the status register are modified as effects of arithmetic and bit manipulation operations. For example, a Z bit may be set if the result of the operation is zero and cleared if it is nonzero. Other classes of instructions may also modify the flags to indicate status. For example, a string instruction may do so to indicate whether the instruction terminated because it found a match/mismatch or because it found the end of the string. The flags are read by a subsequent conditional instruction so that the specified action (depending on the processor, a jump, call, return, or so on) occurs only if the flags indicate a specified result of the earlier instruction.

Some CPU architectures, such as the MIPS and Alpha, do not use a dedicated flag register. Others do not implicitly set and/or read flags. Such machines either do not pass implicit status information between instructions at all, or they pass it in an explicitly selected general purpose register.

A status register may often have other fields as well, such as more specialized flags, interrupt enable bits, and similar types of information. During an interrupt, the status of the thread currently executing can be preserved (and later recalled) by storing the current value of the status register along with the program counter and other active registers into the machine stack or some other reserved area of memory.